Optimization techniques for probe card alignment in wafer-level photonic integrated circuit testing

We present an experimental evaluation of seven optical alignment algorithms tested on the Technoprobe Eclipse Dynamic probe card—a single-unit probe head that co-locates electrical probes and a piezoelectrically actuated fiber array unit, removing the need for external fiber positioners. Each algorithm was evaluated across eight distinct on-wafer die locations (spanning multiple reticle positions) directly on the hardware with the original actuator configuration (100 V/s slew rate, reset-to-zero hysteresis compensation). The measured trajectories were then used to simulate performance under three additional operating conditions: high-speed actuation (3250 V/s), direct-path routing without hysteresis resets, and the combination of both. Performance is compared using dataprofile curves rather than averages alone, following established best practices for solver benchmarking. Among the candidates tested, Local Bayesian optimization and fixed gradient ascent both achieve 100% alignment success across all eight experimental scenarios. Under the original hardware configuration, Local Bayesian is the fastest among the 100%-success methods, converging in 100 a.u. per die. Simulations project that with high-speed actuation and direct-path routing, fixed gradient would achieve 4.6 a.u. per die while Local Bayesian would reach 17.2 a.u. The analysis reveals that eliminating hysteresis reset penalties contributes 2.2–5.6× speedup depending on algorithm, demonstrating that software-based path optimization can deliver substantial performance gains even without hardware upgrades. A phased development strategy is proposed to optimize throughput progressively through software and hardware improvements.