AIML-based process design for cavity etch in silicon photonics

Silicon photonics (Si-Pho) is experiencing rapid advancements, driven by demands on high-speed, low-power optical communication in data centers and emerging artificial intelligence (AI) applications. Different from other specialty devices, some unique photonics features, like cavities, are usually designed for low power optical devices. In general, there are two kinds of cavities, one is under metal heaters for heat loss control, the other one is under edge coupler for better optical propagation. Residue-free cavities are required for better optical transmission; however minimal depth is also necessary to avoid top structure fracture. An extremely lateral etching process (width/depth >3) is expected to break this tradeoff between cavity residue and minimal depth. In this paper, we use Lam internal AI/machine learning (ML)- based platform to speed up our process design and optimize process robustness. Bayesian Neural Networks method is used to train models and predict optimized recipes. Prediction verification on Lam tools gets desired results and save 70% wafer cost. This AI/ML assisting process design solutions enable us to explore other specific and customized structures, not only for Si-Pho manufacturing but also other emerging devices.