Optical overlay metrology for semiconductor device manufacturing (Invited Paper)

The continuous shrinkage of semiconductor device size, as described by Moore’s Law, is a key driver of technological advancement. It allows placing more devices on a small chip and is essential for emerging technologies, e.g. AI, where the computational density and energy efficiency are paramount. Increasing the device density in chips requires innovations not only from the lithography but also in all other steps of the chip manufacturing loop, e.g. overlay control steps need to be performed at sub-nanometer precision levels. Optical overlay metrology faces several technical challenges, e.g. overlay targets becomes smaller as the device density increases. Measuring on a smaller target requires high-NA and high-quality imaging optics in overlay sensors, which lead to higher complexity and cost. Even with perfect lenses, cross-talks between the diffractions orders can lead to overlay error. The Digital Holographic Microscopy (DHM) concept offers potential solutions to these challenges. In the DHM, we image an overlay target on a camera using low-cost high-NA optics with only a few lens elements. It allows computationally correct for aberrations and cross-talks between the diffractions orders, and therefore offers near-perfect imaging for overlay metrology in a cost-effective way. In this talk we will share the insights on the state-of-the-art overlay metrology and the challenges. We will explain the DHM concept and demonstrate some of the solutions with simulation and experimental data.