Is inverse lithography technology (ILT) ready for high-volume manufacturing (HVM): the past, present and future for ILT (Invited Paper)

ILT has been around for two decades, and its superior process-window has been demonstrated with wafer results by multiple fabs throughout the years. But its adoption in HVM has been limited to memory foundries and as a hot-spot repair tool for logic foundry. Three factors hindered the wide adoption of ILT in logic foundry: 1) the long computation time; 2) the large file sizes and long mask writing time; 3) scanners from tool vendors keep improving, making it possible for traditional OPC to meet the process window requirements. The situation is very different today: we have GPU and ML to address the runtime issue, and the new semi P49 standard for curvilinear shapes effectively address the file data volume, and the multiple-beam mask writer can write curvilinear mask in under one day, regardless of the mask complexity. Last but most importantly, the scaling and improvement in scanner is slowing down and is getting very expensive, prompting foundries to squeeze more performance from the existing tools without the expensive hardware upgrade or resort to multiple patterning. The adoption of ILT in HVM at logic foundries are both possible and necessary today. The author was involved in making the full-chip adoption of curvilinear mask represented by spline polygons at a leading foundry. It is anticipated full-chip free-form ILT will go to production running on GPU in 2026. In this talk, the author will review the history of ILT as someone who is an active participant, assess its current sttaus, and report the recent progress and make some bold predictions in the wake of GenAI.