This PDF file contains the front matter associated with SPIE Proceedings Volume 13424, including the Title Page, Copyright information, Table of Contents, and Conference Committee information.

As EUV lithography is pursued at 13.5nm with numerical apertures (NA) of 0.55 and higher, the consequences of large angles on multilayer design, wavelength choice, and ultimate NA are considered. EUV multilayer designs for high-NA applications are presented. Reflectance amplitude and phase-shift analysis are carried out for Mo/Si multilayers up to angles associated with 0.55–0.75 NA EUV lithography, demonstrating the importance of considering phase effects. Through an understanding of the higher-order phase effects, defocus and spherical aberration can be attributed to the mask multilayer. Through RCWA lithographic image simulation, these effects can be confirmed. A depth-grading approach to optimizing multilayers is presented, utilizing the EUV optical properties of constituent materials to achieve improved performance by altering material ratios of the multilayer. By considering the polarization effects at high NA, both at the mask object plane and at the resist image plane, an alternative Ru/Be multilayer combination at a wavelength of 11.3 nm is considered. Through the introduction of an 11.3 nm/0.63 NA option for next-generation EUV lithography, the adverse polarization effects encountered at 13.5 nm/0.75 NA can be lessened, with additional improvement in focal depth. Design options are presented for Ru/Be depth-graded multilayers for optical coatings and mask applications. An evaluation is also presented for La/B multilayers for application at 6.6 nm as a potential EUV lithography option.

The focus of this paper is to highlight IMEC's advancements in extending the resolution limit of 0.33NA EUV single patterning to 28 and to 26 nm pitch for advanced logic technology metal layers, as well as achieving a 32 nm contact-tocontact (C2C) pitch for logic vias, demonstrating progress in patterning technology to further push the boundaries of pitch scaling. We will show recent imec progress in achieving 28 metal pitch single patterning using NA 0.33 EUV on wafer. Separately, we will also show latest progress to pattern random via process down to 32 nm C2C. Our data will cover process window analysis (LER/LCDU, T2T variability and systematic and stochastic defects) looking for a workable Depth of Focus and a path to a lower the dose. Using the most advanced process technology, we will demonstrate the electrical performance of different proposed solutions (simple resistivity test or VC for vias). Different patterning options and their limits will be explored including the use of new underlayers(deposited/spin-on) for dose reduction up to 26%, new track-based development methods for defectivity reduction, complementary added directional etch based patterning to achieve T2T less than 15nm. Finally, through score cards, we will endorse low-NA extension readiness for the industry based on IMEC’s latest results.

Enhanced chip performance and miniaturization in the semiconductor industry are driven by improved lithographic capabilities, such as those of lithography systems with larger Numerical Aperture (NA). The emerging high NA Extreme Ultra Violet (EUV) lithography scanners increase the NA from 0.33 to 0.55, enabling continued shrink down to 8 nm half-pitch for lines/spaces. EUV systems with NA ≥ 0.75 (hyper NA) are being explored to support further cost-effective increases in device density. Our study demonstrates that hyper NA enables pattern shrink in advanced logic node designs projected in semiconductor roadmaps beyond 2030. However, the larger NA presents unique challenges, including enhanced mask-3D effects and reduced Depth of Focus at the wafer level. We address these challenges by focusing on imaging performance and the concerted efforts required by the lithography ecosystem.

An extreme ultraviolet (EUV) pellicle is a thin film used to protect the surface of photomask patterns in exposure devices. Its performance is determined by factors such as EUV transmittance, physical strength, and thermal stability. However, over time, pellicles are continuously exposed to high temperatures and accelerations, which can lead to degradation of performance and increased risk of destruction. Therefore, various analytical techniques have been proposed to predict the lifetime of EUV pellicles. One of them is the development of on-site heating transmission electron microscope analysis technology, which can analyze the real-time change of thin film properties in a high-temperature environment. This technique can analyze the stress of thin film membranes directly related to the deformation or destruction of the film. Another approach proposes a non-destructive verification method that enables the mass application of EUV pellicles in EUV lithography through Raman analysis of defects double resonance in the EUV pellicle membrane. This can predict deformation or destruction of the film by analyzing the degree of damage and stress of the membrane during the use of the EUV pellicle membrane. Furthermore, we can evaluate the mass production feasibility of EUV exposure by analyzing the outgassing of EUV pellicles in high-temperature vacuum environments.

We evaluate the evolution of on-wafer stochastic process window for 1D and 2D patterns as a function of frontside mask clean cycles. Changes seen in the process window can be attributed back to subtle changes in mask properties that are characterized via various scatterometry and AFM techniques. These learnings will help guide design, OPC and mask manufacturing flows to enable stable mask lifetimes in HVM.

The transition from DUV to EUV has moved the industry to use reflective masks. The purpose of this paper is to examine image characteristics of EUV reflective masks, some of which are very different than those of the transmissive masks from DUV. One of these new characteristics is mask shadowing, which reduces the image intensity, thereby slowing throughput. We introduce the “mask shadow bias”  parameter which is proposed as an absolute measure of shadowing. Another characteristic parameter is pole-to-pole image shift, which causes image contrast loss from fading. Typically, the image shift is larger for thinner absorbers, which poses a dilemma for mask optimization. Thin absorbers with less shadowing are good for throughput, but thick absorbers can have better contrast from less image shift. The imaging parameters described in this paper are all measurable, and should be helpful to sort out the large space of possible mask structures. We are strongly driven towards high contrast images, so as to push down the stochastic errors that can limit pattern quality. But we also need bright images, where we can get more throughput to reduce patterning costs. Image shift and shadow bias are useful metrics for optimizing EUV contrast and throughput.

Missing contact hole stochastic defects are modeled as the absence of a development path through layers of solubility units in a resist film. Voxels are solubility units and the probability of each voxel changing solubility is calculated as a function of the aerial image, the depth in the resist and resist parameters such as the absorbance of EUV light and the acid blur. Dose to size is modeled as the dose at which the dissolution probability of a voxel at the edge of the feature is 50%. This model can match the dependence of dose to size of experimental resists using reasonable parameters for acid blur and voxel size. The blockage probability is exponentially dependent on the dose. The overall probability of a blocked via becomes higher as the aerial image becomes worse. The top and bottom layers of the resist film show a much higher probability of blockage than the neighboring layers. This is because there are fewer neighboring voxels to the voxels in the top and bottom layers than in the middle layers, so there are fewer sources of acid to deprotect that voxel. This suggests that resists with a high R_min will show fewer missing vias than resists with no appreciable R_min.

Reducing the imaging wavelength () and increasing the numerical aperture (NA) continues to enable the scaling of feature dimensions. With this trend, the usable Depth of Focus (DoF) is also expected to decrease according to the 2nd Rayleigh equation. Lithography DoF has remained stable for the past two decades with immersion lithography and multiple patterning. However, with the introduction of EUV lithography, the wavelength reduction has been offset by the large decrease in NA. High NA EUV lithography, utilizing the same wavelength as EUV, increases NA leading to smaller DoF and greater attention on focus control. A critical consideration is that focus not only impacts CD control, but also defectivity and pattern placement. Unlike short loop wafers, device wafers typically have residual topography from previous layer processing. Although chemical mechanical polishing (CMP) steps help mitigate this topography, residual topography often remains present at a higher frequency than can be fully corrected by the scanner. In this paper, we explore the effects of wafer topography by introducing programmed height differences in an underlying layer. We prepared multiple wafers where the topography pattern was transferred into oxide layers of varying thickness, resulting in different topography step levels. On these topographies, random logic patterns were printed at 32 nm design rule pitch using low NA EUV lithography. Metrology structures, densely placed across the field, were used to measure the focus offset. By correlating print quality with nominal topography, we investigate how these topographical variations impact the defectivity of the logic patterns. Our findings provide critical insights into the relationship between wafer topography and focus control, highlighting the need for advanced focus monitoring techniques in the era of high-NA EUV lithography.

As semiconductor device scaling continues, the critical dimension CD has continued to decrease. The required CD for advanced device nodes is now beyond the resolution limit of deep ultraviolet (DUV) lithography and extreme ultraviolet lithography (EUVL) is now widely used to meet resolution requirements. Despite continuous improvements in the performance of photoresists, masks, and post-lithography processes, stochastic defects, or stochastic failures 5 - space bridges and line breaks - are still a major factor of yield loss in production14 . Detecting, characterizing, and repairing stochastic defectivity using experimental methods alone is expensive, requiring a lot of wafers, metrology resources and time 9, 15 . We discuss a cost-effective predictive failure probability model - a virtual inspector - and demonstrate how it is an essential tool for the study and reduction of stochastic defectivity in EUVL. We use rigorous probabilistic lithography modeling to construct accurate failure probability models FPMs for EUVL. The computing rate of the FPM admits virtual inspection of full layouts. We confirm that the defectivity predictions of the FPM align well with large-area e-beam inspection results. We demonstrate that the FPM can be used to find the optimal patterning condition and the optical proximity correction OPC that minimize stochastic failures in an EUVL process.

With the advent of ArF immersion lithography, printing gratings down to size of 38nm became possible using dipole illumination settings. Further reduction towards a k1 of 0.25 results in a very small pupil pole size which brings increased imaging complexity. Effects to consider include decrease in contrast, optics lifetime impact and increased impact of lens aberrations and heating. Next to that, metrology markers, with a significantly larger pitch compared to the product feature, have a different imaging response to these extreme pupil settings adding to the complexity. In this work, using a combination of scanner exposures as well as simulations, we demonstrate these challenges in detail. Furthermore, we propose how these effects can be mitigated by modifying the illumination pupil using a new Source Mask Optimization (SMO) flow for an improved imaging, overlay and productivity performance.

Extreme ultraviolet lithography (EUVL) is pivotal for advancing semiconductor manufacturing under 5nm technology nodes. This paper explores the integration of low-n attenuated phase shift masks (att-PSM) and advanced source mask optimization (SMO) technis to address the fundamental challenges posed by EUV lithography, particularly mask 3D (M3D) effects which degrade image quality due to phase errors induced by mask topography. We demonstrate that low-n PSMs significantly enhance optical contrast and reduce line edge roughness, making them crucial for achieving high-resolution patterns at ultra-fine pitches. Additionally, we employ sophisticated SMO strategies, including asymmetric illumination and customized wavefront engineering, to further refine the lithographic process and improvements in normalized image log-slope (NILS) and focus control are achieved. Through comprehensive simulations and experimental validations, we show that the strategic combination of these technologies not only mitigates the intrinsic limitations of EUV but also enhances the overall lithographic process. Through wafer evaluation, we optimized the illumination system for low-n attPSM, significantly contributing to improved best focus (BF) uniformity across different pattern pitches. We achieved a 15% improvement in local critical dimension uniformity (LCDU) compared to the binary (BIN) mask, reducing the LCDU from 2.6 nm to 2.21 nm. The results confirm that these integrated approaches significantly improve the printability of intricate patterns while maintaining high throughput and manufacturing yield, setting the stage for future advancements in EUV lithography technology.

Multilayer masks for extreme ultraviolet lithography (EUVL) are currently structured as repeated pairs of silicon and molybdenum with a patterned absorber on top. This periodic design has performed well during the 0.33 NA era, and with small changes to layer thicknesses, can be expected to maintain high reflection under high-NA (0.55) conditions. Even so, the 3D nature of the EUV mask leads to optical interactions, which worsen as feature sizes shrink, one example being shadowing. In recent years, a great deal of interest has been placed on material changes to the mask absorber with attPSM, low-n, and index-matched absorbers being proposed. In this work we build off the progress in optimizing absorber material by altering the periodic nature of the mask. An aperiodic mask allows each layer to have unique thickness, allowing careful optimization of reflected intensity, phase, polarization, and spectral bandwidth. We show validation of previously presented aperiodic multilayers using Siemens pxSMO. We find for 18 nm pitch lines in the 8x direction a 26% gain in NILS with a similar 19% gain in the 4x direction compared to a periodic multilayer. While results on a horizontal 18 nm pitch metal layer show 10% or higher ILS gains across a wide range of clips when compared to a periodic multilayer.

Digital Scanner (DS), a DUV optical maskless exposure tool, is being developed which has a fine resolution of 130 nm or smaller of L/S half-pitch and patterning flexibility that each chip design can be customized on wafer. In this paper, application of DS for Die to Wafer (D2W) bonding is studied to achieve fine pitch of bonding pads. DS exposure on carrier wafer before bonding can move the pads’ position to the ideal position by changing exposure pattern adjusted for each die placement error. We estimate the minimum bonding pad pitch at die placement accuracy of 200 nm is about 2 μm without DS while it can be down to 0.85 μm with DS248, increasing interconnect density by 5.8 times. Conceptual exposure experiment of placement compensation was performed assuming 5 × 5 dies that each die includes 8333 × 8333 pads with 1.2 μm pitch. The exposure experiment shows DS capability of improvement of pad placement accuracy of 50 nm.

A new era of extending Moore’s Law now begins with how best to enable Advanced Packaging manufacturing. Unlike frontend lithography on CMP wafers with super flatness, chiplet manufacturing requires a lithography tool that meets CDU, overlay, and throughput requirements under challenging substrate conditions. For instance, die displacement during pick-and-place increases overlay errors if uncorrected, and substrate warpage induces lateral pattern distortion, further degrading overlay performance. A production-worthy lithography tool for advanced packaging must address these challenges with high throughput while assuring a chiplet manufacturing roadmap scaling. Applied Materials has developed revolutionary Digital Lithography Technologies (DLT) for both wafer-level and panel-level packaging. Its proprietary Digital Dynamic Connection (DDC) and Unit Alignment technologies correct for die displacement and warpage-induced pattern distortion. The maskless nature of DLT eliminates the reticle-stitching problem when printing large AI packages. Additionally, a high-performance platform can process four wafers simultaneously, quadrupling throughput. With a roadmap extending to 0.5µm and below, DLT is well-positioned to support Advanced Packaging now and into the sub-micron regime.

Displacement Talbot Lithography (DTL) is a photolithography technique utilized for printing periodic patterns, finding use especially in various photonic applications. Unlike conventional proximity or projection lithography, DTL's unique image formation process brings challenges in mask design, particularly for complex wafer patterns requiring non-Manhattan (curvilinear) features on the mask. Writing such curvilinear masks poses challenges for traditional variable shaped beam writers. This paper presents a collaborative effort to create high-resolution DTL masks with curvilinear geometries, leveraging Inverse Mask Design (IMD) algorithms and the capabilities of state-of-the-art multi-beam mask writers (MBMW). Our method addresses the challenge of making suitable masks for DTL, especially for intricate target patterns. By combining the benefits of DTL, machine learning algorithms, and cutting-edge mask writing techniques, this approach expands DTL's potential applications and enhances the utility of MBMWs in advanced lithography processes.

The growth in the semiconductor industry is accelerated by Artificial Intelligence (AI) applications, introducing new requirements for lithography equipment. Underlying these requirements are process technology innovations, like novel transistor designs, new integration schemes based on wafer-to-wafer bonding and advanced packaging technologies. This paper presents an overview of the key technology developments for DUV lithography equipment supporting these AI trends.

Mask3D-induced effects, including orientation-dependent image asymmetries, non-telecentricity, pitch-dependent best focus, and image blur, are increasingly important for EUV imaging. To improve the fundamental understanding of these effects and their impact on the optical resolution limit of high NA and hyper NA EUV lithography, this paper investigates the imaging of lines/spaces (L/S) with a pitch of 9 nm using an ideal fictive diffraction-limited projection system with a NA of 0.85. The results of our simulations suggest that mask3D effects will not limit the achievable imaging performance of high NA and hyper NA EUV systems. Comparisons of rigorous mask simulations with results obtained by a Kirchhoff (flat) mask model indicate that mask3D effects do not necessarily negatively impact EUV imaging. Absorber patterns for the smallest pitches behave like volume gratings. Such volume gratings exhibit a significant dependency of the diffracted light on the illumination direction. In contrast to thin gratings, volume gratings enable a more flexible distribution of light between diffraction orders. Based on the improved understanding of the involved imaging mechanisms, one could take advantage of mask3D effects to enhance the imaging performance. The opportunities for such innovative solutions depend on the limitations of mask fabrication, which are not considered in this discussion.

The new high numerical aperture (0.55NA) Extreme Ultraviolet Lithography (EUVL) machine is using an anamorphic projection system, with the demagnification of 4× in x-direction and 8× in y-direction. Due to this 8× demagnification in y-direction and the unchanged six-inch reticle size, 0.55NA EUVL reduces the exposure field size to half-field (26 × 16.5mm²). Therefore, the in-die stitching between two exposures might be needed for the applications requiring larger than half-field size. In this paper, we will investigate the feasibility of in-die stitching by using bright field masks (both low-n attenuated phase shift mask and Ta-based mask are considered). The impact of decomposition rules, sub-resolution gratings as well as the mask quality on stitching patterning fidelity will be discussed and evaluated.

Further shrink of device pitches requires a balanced Edge Placement Error (EPE) budget. A major contributor to the EPE budget are local effects. In ArFi critical use cases, these local effects are best quantified by the parameter Line Edge Roughness (LER). In this paper, we present a generic methodology to quantify and breakdown the LER measured at ADI into components. This helps to identify the major contributors and supports predicting the value of improvements. Here, we demonstrate our concept on an ArFi DRAM layer. However, the methodology is universal and applicable to other use cases such as EUV LCDU.

Gate patterning within the next generation transistor architectures have moved towards single expose EUV patterning. As the gate critical dimension and pitch scales down, there is an increasing focus on the reduction of EUV stochastics mediated effects on patterning. In particular, there is substantial interest in reduction of LER and LWR in the 40-50nm pitch regime to meet aggressive process assumption and device performance targets. Previously, we demonstrated low gate width roughness (GWR) through the introduction of a 3-beam conventional (monopole) illumination approach. The high NILS offered by this scheme was shown to be effective in reducing the low frequency gate width roughness. Here, we evaluate novel material stacks towards LER/LWR reduction at 40-50 nm pitches by combining the previously proposed monopole solution with next generation CAR and metal oxide resist platforms. Specifically, we evaluate the LCDU and LWR contributions to overall stochastics and evaluate roughness at device relevant length scales.

There is a question about whether the level of EUV resist processes has reached that of DUV regarding resolution capability and stochasticity. This paper introduces a directional graph network model to explain the statistical nature of lithography and the problems in EUVL. High-performance natures of lithography processes are explained as the characteristics of the network based on the multi-photon/multi-reaction induced molecular solubility-switching and collaborative molecular dissolution processes. However, they become dysfunctional due to inhomogeneous event generations and increasing ratios of molecular sizes to pattern sizes in EUVL. The network model also opens the path to full statistical probabilistic lithography simulations.

Enhancing device yield is crucial for the adoption and economic viability of next-generation process technologies. Achieving high device yield near the wafer edge is particularly important and challenging because there are many more die near the wafer edge compared to the center, and maintaining process uniformity near the edge can be more difficult. For instance, plasma etch uniformity may differ near the wafer edge compared to the center, leading to tilted profiles or variations in critical dimension (CD) after etching. In lithography, maintaining overlay, leveling and focus control near the wafer edge can be more difficult than wafer center. With the advent of EUV lithography, focus offsets not only affect CD but also impact stochastic defectivity and pattern placement, thereby inducing numerous defects particularly around wafer edge. In this paper, we explore single layer defectivity on uniform EUV exposed wafers with a 28 nm minimum pitch logic metal pattern. We demonstrate how to distinguish defect contributions from etch and lithography processes.

Large-format chips and interposers are a necessity in tailored applications where fast and high-bandwidth communication between a large number of computing or memory cores is critical. This is especially true for AI, server, optics, and quantum applications. Chips with distinct designs that are larger than a single exposure field require the use of multi-reticle stitching to achieve a cohesive circuit. This study provides an overview of multi-reticle stitching techniques from the standpoint of mask design, process, and characterization. Through the analysis of stitch process data from i-line, DUV, and EUV we probe the costs and benefits associated with multi-reticle stitching, the co-optimization of stitching and layer-to-layer overlay performance, and provide specifications for robust process designs that utilize stitching.

Lithographic patterning requires precise and accurate alignment for all layers. Diffraction based alignment and overlay metrology is performed on periodic grating structures printed on the previous layers; this metrology enables correction for wafer deformation—x,y stress from wafer table clamping, chuck spots, etc—during the patterning step. Semiconductor processes such as etching and chemical mechanical polishing (CMP) impact the grating’s groove depth, floor tilt, and sidewall angles resulting in an asymmetric pattern. Asymmetry causes uncertainty in the mark position. Combining the parallel acquisition of multi-wavelength alignment signals together with sensor simulations, we can correlate the impact of processing on the grating with the through wavelength sensor response. This correlation enables monitoring of asymmetry, problematic processes to be pinpointed, and the impact on metrology quantified. Scanner wafer alignment can provide a comprehensive, throughput neutral and accurate process monitoring capability on every wafer.

The M3D effect causes telecentricity errors at the illumination slit edges, when the dipole illumination is used for vertical L/S. The telecentricity errors at the right edge and left edge have opposite signs, so they cannot be compensated by changing the sizes of the two poles. The M3D overlay error is defined as the product of the telecentricity error at the illumination slit edge and half the depth of focus. The M3D overlay error depends on the scanner NA and the absorber material. When the conventional Ta absorber is used, the error is negligible for NA 0.33 scanners. It is slightly below the overlay budget for NA 0.55 scanners. However, it exceeds the budget for NA 0.75 scanners. The M3D overlay error becomes larger when PSMs are used. The root cause is the large phase distortion at the absorber sidewalls. The M3D overlay error can be reduced by using binary masks. Binary masks are required for hyper-NA lithography.

Low-n attenuated phase shift mask (Low-n mask) has been widely used in EUV lithography industry as it aligns the diffraction phases between the zeroth and first orders, enhancing exposure latitude (EL) and boosting throughput. However, it has faced challenges such as side-lobe printing due to its high reflectivity and best focus (BF) variation when used in environments with a wide range of pattern pitches. To mitigate this, conventional sub-resolution assisted features (SRAF) could be inserted, but as the main features’ pitch decreases, the space that needs to be inserted in between also decreases by nearly half or more, it will become challenging when scaling to Hyper NA dimensions. We proposed Sub-Resolution Grating (SRG) crossing the main features perpendicularly, which not only suppresses unwanted side-lobe printing but also improves the imaging quality with a better BF alignment over a broader pitch range by effectively aligning diffraction phases. The SRG helps correct issues such as Bossung tilt and critical dimension (CD) asymmetry in non-repeating n-bar patterns, which certainly contributes to CD-based process window (PW) enhancement. This paper demonstrates, through rigorous simulation, that this technology can ultimately overcome the limit

Extreme Ultraviolet (EUV) mask imaging requires higher resolution and phase sensitivity for next-generation lithography. This work explores Fourier Ptychographic Microscopy (FPM) as a solution, addressing challenges such as field-dependent aberrations outside of the miscrope’s designed field-of-view (FOV) for 1D and 2D patterns. Using binary pseudo-random mask patterns (BPRP) and various reconstruction algorithms, we achieve a 1.8× enhancement beyond the 0.5λ/NA resolution limit, improving the resolved feature size from 82 nm to 46 nm across a 30 µm × 30 µm FOV. FPM’s phase reconstruction also enables arbitrary illumination synthesis, allowing for the computational emulation of diverse illumination patterns from a single FPM dataset. These results demonstrate FPM’s potential as a powerful computational imaging tool for high-NA EUV mask imaging and metrology.

Extreme Ultraviolet (EUV) lithography tools are used to manufacture state of the art integrated circuits. EUV photons are generated by hitting a small tin droplet with a powerful CO₂ laser. Hydrogen gas is pumped into the EUV source vessel in order to decelerate energetic tin ions emitted from the ablation of tin droplets at the primary focus. Without deceleration, the collector mirror would be destroyed rapidly. Knowledge of the fundamental physics of how hydrogen gas decelerates the ion is needed to inform several design decisions such as the distance between the laser produced plasma and the collector mirror. Current work at the Center for Plasma-Material Interactions is focused on learning the fundemntal transport properties of tin ions as well as other prevealent species found inside EUV sources. This has been done through a mix of numerical and experimental techniques. Transport properties such as the total cross section, stopping power, diffusion coefficient, and viscoisty have all been calcualted fromn first principles using quantum cemisty codes and classical scattering theory. Several experiments are in the rpocess of validating the predicted measurments.

We have developed multilayer interference optics with high efficiency, good stability, customized bandwidth and phase control, to manipulate the ultra-short pulses generated by EUV/X-ray coherent sources, such as High Harmonic Generation or Free Electron Lasers. These sources and optics are also highly relevant in EUV metrology and photolithography. In this paper, we discuss examples of novel, tailored multilayer optics that we have been developing for the last 20 years for ultrafast sources. We show that phase-controlled multilayer reflective optics provide a powerful tool towards transporting or even compressing attosecond pulses. Finally, we discuss the possibility of using phase-controlled multilayer mirrors in the soft X-ray domain.

In 1993, two approaches to soft-x-ray projection lithography were proposed, based on transmissive photomasks and planar arrays of transmissive diffractive Fresnel zone plates. Given the high cost of current EUV lithography systems, the problems of non-axial reflective optics and current efforts to develop free-electron lasers (FEL) for lithography, the use of transmissive diffractive microlenses and transmissive photomasks was revisited, as well as the maskless version proposed in 1996. The high intensity, collimated output and adjustable wavelength of the FEL, together with modulator concepts based on grazing incidence reflection, make maskless, soft-x-ray-based lithography attractive. The key elements of such a system, called XZPAL, are reviewed and prospects for innovations in semiconductor manufacturing presented.

An EUV interference lithography tool is under development at SLS 2.0, the Paul Scherrer Institute synchrotron in Switzerland and is expected to be operational in late 2025. The tool is designed to overcome the factors limiting the performance of the interference lithography method based on two decades of experience. We aim for better reproducibility, resolution, and throughput. We target to achieve subnanometer stability over a one-minute period – more than the duration of a typical exposure by mitigation of thermal and mechanical drifts and vibrations. The tool is designed for patterning on Si wafers up to 8 inch using interference lithography with transmissive diffraction gratings or mirrors and focused beams (direct writing with Fresnel zone plates or Bessel beams). The new endstation is expected to have a high impact on the EUV community pushing the resolution of photon-based lithography even further and enabling research towards and beyond hyper NA EUVL.

A projection imaging system for EUV lithography uses a number of mirrors to guide light from an object plane onto an image plane. To avoid obstruction of the reflected light by the mirrors, the mirrors must be tilted by various angles with respect to each other. Light reflected from a tilted mirror undergoes a polarization rotation which is different for different points on the mirror. In this paper, the phenomenon of tilt induced polarization rotation and its importance in present and future generations of high-NA EUV lithography is discussed.

ASML has been making steady advances in Extreme Ultraviolet (EUV) light source capability for more than 15 years. Since introduction of the 250W EUV light source in 2018, which ushered in the era of EUV High Volume Manufacturing, the EUV source power delivered to lithography customers has doubled, with the latest generations of 0.55 numerical aperture (High NA) and 500W EUV light sources now operating at customer sites. In this paper, we outline the progression of EUV source capabilities driven by substantial evolution of various aspects of the EUV source architecture, and we introduce the next generation of >600W EUV light sources. These next generation light sources deploy a novel laser architecture for tin target formation as part of the laser produced plasma. The improved target formation process enables an improved conversion efficiency of laser to EUV light, improved tin debris characteristics, and long-term power-scaling capabilities enabling >1000W EUV light sources in the coming years.

EUV lithography has evolved into a mature workhorse technology for critical application layers of almost all of today’s high-end products and, quite naturally, has found its way into our pockets and everyday lifes. To allow maximum productivity optimization tailored to the actual process demands, ZEISS and ASML provide two EUV scanner product lines: the NA 0.33 product line with 13 nm resolution and the NA 0.55 product line with 8 nm resolution. Both product lines are continuously developed further. In this work, we show how throughput of the NA 0.33 product line has been further increased while at the same time optical performance could be improved. Switching to NA 0.55 we present in-resist images and aberration data of the very first delivered systems of this product line. For both product lines we then outline the respective performance and productivity roadmaps that are currently in development to support process requirements of future nodes. Finally, we conclude with a short glance at the progress of construction works at ZEISS to enable ramping & securing EUV optics production for the coming decade.

This work presents the development of single-print metal logic patterning for A14 and A10 technology nodes using the TWINSCAN EXE:5000 at the ASML-imec High-NA lab, following successful pattern transfer via etch. The study focuses on random logic metal designs characterized by tight pitch constraints and aggressive tip-to-tip spacing, addressing the patterning challenges associated with advanced node scaling.

As the logic device generation has shrinkage, the integration complexity of circuits increases more than 10%, that means patterning team directly faces difficulties of smaller pitch and CD uniformity. In particular, the metal lines and via contacts of BEOL is directly faced optical limitation of lithography. Passing through this hurdle, most of foundry companies use multi patterning process like LELE(Litho-Etch-Litho-Etch) or SA-DPT(Self Aligned Double Patterning Technique). To be honest, there was no option to choose for lithography engineering these days. In 2024, We’re starting to test with High NA Tool, EXE5000 of ASML which is a brand new and state of art option for pattern. We are demonstrating from basic tool performance, pattern limitation and margin. And we are matching EXE5000 tool with ECO System like UL, Resist, Development tool and etc. In this paper, I will report a basic pattern performance of EXE5000 tool and figure out the position which hNA process might be located according to product road map. And I finally forecast the first layer applying high NA for product.

Constantly evolving with several revolutionary technologies, High NA EUV Lithography is at the forefront of the semiconductor industry. It enables the patterning of sub-10nm features, dramatically boosting transistor density and chip performance. This technology is essential for propelling Moore’s Law into the future. Early access to TWINSCAN EXE:5000 High NA EUV scanner, a state-of-the-art facility in the joint ASML-imec HNA EUV Lithography Lab, has enabled the exploration of leading-edge random via use cases. This access facilitates testing HNA EUV use cases, refining manufacturing processes, and accelerating innovation. In this paper, we share the result of imec’s first HNA EUV reticle. Key highlights of this work include demonstrating defect-free random vias with a 29.7nm center-to-center (C2C) distance, corresponding to underlayer metal grids of 22nm x 20nm pitch. We show excellent pattern fidelity showcasing LCDU~1.5nm, validating the process for even smaller via dimensions at 0.55 NA.

We present the results of high-NA (0.55 NA) exposure using dry resist for various use cases such as aligned T2T structure, logic metal PnR (place and route) and memory bit-line-periphery (BLP) - storage node landing pad (SNLP) DRAM structures. In single exposure, we successfully print dark field metal logic PnR down to P20 nm, with T2T CD ~ 19 nm and LCDU 3σ ~ 4 nm. For dark field regular T2T structure, a LCDU 3σ of ~ 3.5 nm is demonstrated for P28 nm T2T CD ~ 13 nm, while for P20 LCDU 3σ of ~ 3.8 nm is achieved for T2T CD ~ 16 nm. For the memory DRAM use case, we demonstrate patterning of BLP and SNLP in a single EUV exposure at pitch 28 nm having dose reduced by ~40% with respect to 0.33 NA P34 nm single exposure. We also demonstrate the on-wafer depth of focus (DoF) increase by pupil optimization. Our results indicates that the high NA single exposure can be a potential solution to replace complex multipatterning technology.

The introduction of multi-beam mask writers marks the beginning of the curvilinear era in semiconductor manufacturing, offering a promising approach to enhance the process window in lithography [1, 2, 3]. This paper investigates the application of curvilinear solutions in DRAM 2D array layouts, with a particular focus on improving Linewidth Control Uniformity (LCDU) using Deep Ultraviolet (DUV) lithography at 193 nm immersion (193i) technology. As DRAM technology continues to scale down, maintaining LCDU becomes increasingly challenging, even with advanced Resolution Enhancement Techniques (RET) like Source Mask Optimization (SMO) and Inverse Lithography Technology (ILT). This paper presents a comparative analysis between traditional Manhattan designs and curvilinear approaches, highlighting the potential benefits of curvilinear solutions in improving LCDU. The study includes simulation results, wafer data, and a detailed evaluation of the effectiveness of curvilinear mask solutions in enhancing DRAM lithographic performance. The findings demonstrate that curvilinear approaches can significantly improve LCDU in 2D array layouts, a critical requirement for the continued scaling of DRAM technology and next-generation semiconductor devices.

Gigaphoton Inc. developed a Sn-LPP-EUV light source for mask inspection systems. This light source uses a Sn droplet generator with an in-line Sn fuel supply system, minimum mass Sn droplets, a double-pulse laser irradiation scheme with precise shooting control and a debris mitigation technology with H₂ buffer-gas flow. During continuous operation at 20 kHz repetition rate, the light source had a plasma point brightness of 120 W/mm²-sr and a stable EUV energy 3σ-value of about 4~5%. The reflectivity degradation of the EUV collector mirror was 9.4% after 4111 hours and the system availability was 99.2%.

One running hypothesis is that the dose shift of metal oxide resists in extreme ultraviolet lithography is caused by the thermal insulation effect of the underlayers that hinders the thermolysis. To prove or disprove this hypothesis we prepared a series wafers with varying dielectric materials and thickness as stack, and compared the experimental dose to gel of the metal oxide resist with the total thermal resistance of those stacks. As the thickness of these “back end of line” dielectrics was below sub-100nm, their thermal resistance becomes vanishingly small, which poses a metrology challenge. We used steady state thermoreflectance, a highly sensitive thermo-optical technique, to characterize the thermal properties of these films and stacks and to make a model for the temperature drop across the photoresist film. It was found that the temperature drop is smaller than 1 °C and the thermal hypothesis can be therefore rejected.

Semiconductor manufacturers today are facing increasing social pressure to enhance sustainability while needing to simultaneously boost productivity. Gigaphoton has addressed these demands by developing G65K, the world’s first 6 kHz KrF light source. Thanks to the integration of proven GT laser technologies, G65K can deliver up to 90 W output, more than twice compared to existing 40 W KrF lasers, while also lowering the frequency of gas refills. These features bring improved throughput and availability to lithography tools. Additionally, G65K contributes to sustainability through various measures, including Hg-free wavelength calibration, reduced gas consumption, and lower electricity usage.

Extreme Ultraviolet (EUV) lithography requires pellicles with high transmittance and reduced thickness to minimize throughput reduction. However, as the pellicle thickness decreases, it leads to a degradation in mechanical properties and thermal stability, ultimately causing pellicle destruction. Therefore, enhancing both mechanical and thermal properties while maintaining high transmittance is an important issue for EUV pellicles. In this study, we evaluated the mechanical and thermal stability of ZrSi₂ material with exceptional optical properties by controlling its microstructure at a constant thickness. A ZrSi₂ thin film was deposited onto a SiNx free-standing membrane to fabricate a composite pellicle. The ZrSi₂ composite pellicles with various grain sizes were produced through an annealing process. The ZrSi₂ thin film exhibited an inverse Hall-Petch relationship at certain grain sizes. Additionally, thermal stability was confirmed to be reliable. By controlling the grain size, significant improvements in both mechanical properties and thermal stability of the ZrSi₂ composite pellicles were achieved. This study demonstrates that controlling the grain size in ZrSi₂ composite pellicles can enhance both their mechanical properties and thermal stability. The results demonstrate the potential of ZrSi₂ material to address the challenges in EUV pellicle.

This paper proposes a pixelated source polarization optimization method to enhance lithographic performance in high-NA EUV lithography. While polarized illumination and source optimization are well-established techniques for improving critical lithographic metrics such as resolution and process window, conventional source optimization methods primarily focus on modifying the source shape distribution while keeping the polarization state fixed, which limits the full potential of optimization in advanced patterning. To overcome this limitation, source polarization optimization determines the optimal polarization angle for each individual point source, leading to significant improvements in lithographic performance. We systematically analyze the impact of pixelated polarization illumination in high-NA EUVL and show that an optimized pixelated polarization source enhances NILS, nDOF, and overall pattern fidelity, particularly for complex DRAM patterns incorporating L/S, diagonal, and C/H structures. Furthermore, by improving pattern fidelity and process margins, pixelated source polarization optimization enables the fabrication of smaller DRAM patterns, pushing the limits of high-NA EUVL in advanced memory manufacturing. Our findings show that pixelated polarization optimization is a viable approach for next-generation high-NA EUVL, improving pattern fidelity and enhancing process stability, ultimately helping to overcome scaling challenges in advanced semiconductor manufacturing.

Inverse Lithography Technology (ILT) has emerged as a groundbreaking advancement in computational lithography, offering a robust mask solution to enhance the process window. A significant challenge associated with ILT implementation is its high computational demand. Given this consideration, the initial application of ILT should focus on memory products featuring repetitive cell-based designs. In this paper, we investigated the improvement of imaging performance using ILT for memory-like array patterns within a memory OPC framework. This framework consists of a four-step optimization process: hierarchical layout partitioning based on repetitive unit cells, classification of partitions into unique and non-unique pattern groups, SRAF insertion and OPC optimization for unique partitions, and propagation of the optimized solutions to non-unique partitions. To evaluate the advantages of ILT over conventional OPC in memory OPC flows, we selected four pattern designs with varying pitches and staggered array configurations. The simulated lithographic metrics, including Normalized Image Log Slope (NILS), Mask Error Enhancement Factor (MEEF), Process Variation Band (PVB), and Depth of Focus (DOF), were systematically compared. For dense and staggered array patterns, ILT demonstrated superior performance with NILS and DOF improvements, compared to conventional OPC. Furthermore, the ILT-corrected memory OPC layouts exhibited good pattern consistency across the entire 800um x 800um layout, as verified by extensive sampling at various locations including centers, edges, and corners. These results underscore the effectiveness of ILT in enhancing lithographic performance for memory applications. Furthermore, we performed experimental validation using actual mask SEM image data, analyzing both Mask Mean to Target (MTT) and mask uniformity to further confirm the benefits of the ILT approach. The findings of this study demonstrate that ILT offers a promising solution for improving lithographic performance in memory applications, particularly in achieving consistent pattern fidelity across large-scale layouts.

Exploring the single exposure imaging boundary of deep ultraviolet lithography at the machine end is of significant importance. Imperfections in lenses, including stray light, aberrations, and apodization play critical roles in influencing imaging performance, especially under aggressive exposure conditions. Providing a quantitative map of the impact of these imperfections on imaging performance of different patterns has important guiding significance for practical exposure exploration. For this reason, we systematically simulated the impact of these three main imperfect sources on imaging, including imaging exposure intensity, imaging contrast, and process window based on optimized source. The results indicate that the influence of stray light on pattern contrast is negligible, with variations consistently below 0.5%. Furthermore, aberrations exhibit a minimal impact on imaging contrast and depth of focus, with deviations of less than 1%. The application of apodization functions significantly alters the distribution of exposure intensity and the magnitude of contrast, with the extent of this effect closely related to the edge pupil transmission and the degree of attenuation in pupil transmission. This study provides essential simulation-based insights for the investigation of stray light, aberrations, and apodization.

Atomic processes and radiative transfer in laser-pumped plasmas are investigated to develop a model to reproduce the EUV spectrum, which can be applicable for the optimization of the pumping conditions by accurately estimating EUV power and efficiency available from the plasma. A collisional radiative model of tin is developed using the computational atomic data. The EUV spectrum from the plasma is calculated taking the detailed structure of atomic transitions and using the model of radiative transfer, which shows reasonable agreement with the experimental spectrum. The model will be applied to the investigation of shorter wavelength sources.

The Laser-assisted Discharge-produced Plasma (LDP) EUV source is a system to generate EUV from discharged plasma triggered by laser on one electrode disc which is coated by tin film. The source has been proven as a highly reliable light source in EUVL high volume production. Also, LDP EUV source enables to generate high brightness with relatively larger EUV plasma, which benefits space stability as well as relatively larger plasma power. In this session, the following items will be presented. (1) LDP EUV source configuration and operation sequence. (2) LDP EUV source key performance. (3) Stability Improvement. (4) Reliability improvement. (5) Sample exposure application.

Mask-less lithography like direct laser writing (DLW) is a popular tool for flexible prototyping of integrated circuits, MEMS, NEMS and more recently photonic structures such as 3D meta materials or waveguides. Although the latter already demonstrated impressive free-standing 3D structures, the structuring on arbitrarily shaped free-form 3D substrates is often overlooked. To realize accurate and homogeneous structures, a tightly focused exposure spot must be maintained on different heights of the substrate. Therefore, a novel optical probe is integrated into the beam-path to provide a feedback-signal for a highly accurate nano-positioning and nanomeasuring machine (NPMM). The designed differential confocal probe demonstrates single-digit nanometer axial resolution of single surfaces. Its signal is integrated into the control structure of the NPMM and is additionally used for preliminary in-situ characterization of the substrate. A first demonstration on a 5° inclined glass substrate exhibits straightness below the visual diffraction limit.

Inside Extreme Ultra Violet (EUV) lithography machines multiple scanner materials and components interact with the so-called EUV-generated hydrogen plasma. To gain knowledge about these interactions we conduct controlled experiments using laboratory setups at TNO, where selected properties of the EUV-generated plasma are mimicked. In this paper we present a novel plasma setup called EBR (Electron Beam Research), which uses an electron beam to generate a lowtemperature and high-flux hydrogen plasma. The properties of the e-beam generated plasma like ion flux, peak ion energy, radical-to-ion ratio are similar to the EUV-generated scanner plasma. Unlike any other plasma facility at TNO, the EBR setup can produce a pulsed plasma with a tunable pulse duration in 40 ns to 1s range at frequency varying from 1 Hz to 700 000 Hz. Thanks to that also the time-dependent behavior of the ion-flux from the scanner plasma is reproduced inside EBR for more realistic material and optics life-time testing.

The reduction of Line Width Roughness (LWR) and Line Edge Roughness (LER) is crucial for improving edge placement error (EPE) in ArF immersion lithography. This is especially important for patterns with a pitch of 80nm or less, where low image contrast exacerbates LWR and LER. Among the many factors that can affect the LWR/LER, we believe that the contributions of photoresist and laser speckle are important, and therefore we focused on these two factors in this study. For the photoresist, we have tested 5 combinations of two types of platforms and three different Monomer Deprotection Efficiencies (MDE) in order to figure out the effect of LWR/LER reduction. Notably, one of the 5 combinations is a photoresist for mass production using a conventional platform and is used as a benchmark for the experiments. The speckle is known to be caused by coherence, which consists of spatial coherence and temporal coherence, of the lasers. In this experiment, we controlled the coherence by adjusting the temporal coherence and investigated the effect of speckle on LWR and LER. Furthermore, since the temporal coherence is inversely proportional to the laser bandwidth, e.g., E95, we controlled the temporal coherence by setting E95 to 0.20pm, 0.30pm and 0.45pm in the experiment. As a result, it was confirmed that the new platform resist has a better LER than the conventional platform resist, and that the LWR/LER tends to improve significantly when the MDE is above a certain value. It was also confirmed that the wider the E95, the better the LWR/LER.

Various materials are being tested as new EUV mask absorber for next-generation EUV lithography. In particular, the demand for low-refractive-index (low-n) materials have increased in recent years due to its high contrast by phase shift effect. Among the low-n materials, properties such as wafer printability and mask process need to be considered to determine whether the materials can be used as an absorber. In this work, progress of the low-n materials will be updated including etched pattern profile, chemical durability, and initial repairability test results. Also process window simulation was performed and compared with current tantalum-based absorber, to further understand each material’s optimal use case.

As the semiconductor industry progresses toward smaller feature sizes and higher performance, the precision of photomask fabrication becomes increasingly critical, particularly with the widespread adoption of Extreme Ultraviolet (EUV) lithography. The demand for tighter design rules and higher production yields underscores the importance of advanced photomask writing technologies in ensuring accurate pattern transfer and the overall success of semiconductor manufacturing. This paper provides a detailed comparison of two key photomask writing technologies: Variable Shaped Beam (VSB) and Multi-beam (MB). The analysis centers on their effects on Critical Dimensions (CDs) on both the photomask and the wafer, which are crucial for maintaining precision in device fabrication. The study explores how specific design features, such as line-space and pillar patterns, behave when written using VSB and MB technologies under EUV conditions. These patterns, which have undergone Optical Proximity Correction (OPC), play an essential role in various semiconductor applications, and deviations in their reproduction can significantly impact device performance and yield. The comparison assesses the accuracy and consistency of CDs between the two writing methods and examines their influence on overall photomask quality. By investigating the performance differences between these technologies, the paper highlights their respective strengths and limitations, particularly in terms of CD accuracy and consistency. The findings provide valuable insights into optimizing photomask fabrication, with implications for improving semiconductor device quality and yield in the era of advanced EUV lithography.

Recent advancements in extreme ultraviolet (EUV) lithography have highlighted the potential of low-n low-k materials to enhance imaging performance metrics such as contrast, normalized image log slope (NILS), depth of focus (DoF), telecentricity error (TCE), and threshold to size (T2S). Despite these advantages, current low-n low-k materials face challenges including sidelobe printing and limitations in breaking the low k1 factor. This paper introduces a novel low-n low-k Quasi Phase-Only Mask (POM) designed to overcome the k₁ limit by leveraging frequency doubling effects. Molybdenum (Mo) is utilized as the primary absorber material due to its low refractive index (n) and low extinction coefficient (k), which provide greater phase modulation with minimal absorption losses. Mo is also compatible with existing semiconductor manufacturing processes, facilitating easy integration into current production workflows. The proposed quasi-POM demonstrates the ability to break the k₁ limit down to 0.25 using a simple coherent point source, significantly outperforming conventional phase shift masks (PSM) and binary masks in terms of imaging resolution and quality in EUV lithography. This development contributes to the advancement of lithography technology, potentially improving resolution and imaging performance for semiconductor manufacturing processes.

An EUV pellicle is a crucial component used to protect EUV photomasks from particle contamination. These pellicles are made from extremely thin membranes that must exhibit high EUV transmittance and durability under EUV exposure conditions, particularly under high-power EUV irradiation and in hydrogen environments with plasma and radicals. Various materials, including carbon nanotubes, have been considered as candidates for pellicle membranes. However, achieving the required properties at a high level for both transmittance and durability remains a significant challenge. In this paper, we propose beryllium as a material that balances these properties effectively. NGK Insulators, Ltd. is one of the few companies worldwide capable of manufacturing beryllium products. We have successfully produced the world’s first ultra-thin beryllium membrane, demonstrating its potential as an ideal material for EUV pellicles, achieving greater than 90% EUV transmittance. The membrane’s lifetime (durability) was also assessed under conditions equivalent to 600W EUV power (30W/cm2) in a hydrogen atmosphere, with the pellicle membrane withstanding EUV irradiation for more than 50,000 wafers. Additionally, regarding the toxicity of beryllium, which is generally a concern, we have confirmed that it meets international safety standards.

The theoretical resolution limit of high-NA EUV lithography remains uncertain, particularly regarding its feasibility for direct printing of P16 line/space. The vertically stacked interconnect layers are increasingly integrated to enhance device performance beyond resolution constraints. However, this approach introduces thermomechanical challenges. This work investigates the impact of thermal stress on EUV lithography in advanced three-dimensional wafer structures, which are crucial for future nodes. Finite element simulations reveal that increasing layer counts exacerbate thermomechanical mismatch, leading to greater in-plane deformation during EUV exposure. Simulations based on representative logic and DRAM structures show that as material diversity increases, thermal deformation rises. Additionally, an increase in exposure dose further amplifies deformation differences across sublayer stacks, potentially degrading overlay accuracy between EUV layers. These findings highlight the growing complexity of overlay control in multi-layered EUV processes.

The reduction in exposure field size has introduced new challenges with the introduction of high-NA EUV scanners. To address these issues, expanding the current 6" × 6" mask format to 6" × 12" is being considered, requiring prior evaluation before adoption. Even small deviations can significantly impact pattern overlay in high-resolution designs using high-NA processes, making the thermal deformation of the mask due to EUV absorption a critical concern. This study analyzes the effects of various conditions, including large masks, on the thermomechanical stability of the mask during exposure through simulations. The results show that as NA increases, the changing scan conditions lead to higher mask temperatures and deformation. However, at high-NA, the 6" × 12" large mask exhibits superior thermomechanical stability compared to the 6” × 6” mask.

With the introduction of Extreme Ultraviolet (EUV) lithography, DRAM chips now have the potential to be patterned at the 10 nm node. DRAM critical layers, which include the Bit-Line Periphery (BLP) and Storage Node Landing Pad (SNLP), are strong candidates for EUV patterning. To print diverse patterns on a layer, various approaches, such as double exposure, have been explored to achieve successful patterning. Moreover, Optical Proximity Correction (OPC) is essential to accurately print the designed patterns onto the wafer. However, as the feature size of the target design decreases, the corresponding reduction in mask pattern dimensions leads to increased complexity in OPC computation due to Mask Rule Check (MRC) constraints. In this study, we discuss a source optimization method to minimize OPC challenges and enable single-exposure patterning for DRAM critical layers. By applying an optimized illumination system, we demonstrate the ability to print patterns with high fidelity while simultaneously achieving high imaging performance and sufficient process margin.

Excimer laser performances above 7kHz have been evaluated as lithography system light source. Particularly in the chamber higher repetition rate operation, challenges are extreme increases in fan motor power and instability of laser optical performance. Regarding the first challenge, discharge products are not adequately removed due to the shorter interval between each pulse at higher repetition rates. This makes the next discharge unstable. To stabilize the discharge, faster gas speed blowing between electrodes is needed. The gas speed can be increased by rotating the fan motor faster, but such a measure increases the electrical power consumption of the fan motor. Therefore, the gas circulation path of the chamber’s inner structure is modified to reduce gas separation from inner wall, and the gas is driven more efficiently to avoid extreme increases in fan motor power. Regarding the second challenge, as the interval between discharges shortens, an acoustic wave produced by the discharge has a strong effect on the next discharge, shifting the laser wavelength and broadening or narrowing the spectral bandwidth. The problem with high repetition rate operation is acoustic waves with short propagation paths, which reflect near the electrodes and return to the discharge area. Therefore, acoustic suppression materials are placed near the electrodes, thus avoiding wavelength and spectral bandwidth instabilities.

The empirical relationship between line edge roughness (LER) and normalized image log-slope (NILS) for line/space (L/S) patterns with different L/S ratios and a fixed pitch over 100nm is explored. A multi-die reticle was created, with each die having a fixed optical proximity correction (OPC) bias. The OPC biases were selected to vary NILS within 20% of the optimal NILS for the intended on-wafer after-develop-inspect (ADI) critical dimension (CD) target. LER was measured for each die shot at a dose that achieved the ADI CD target. The dependence of LER on NILS for two different chemically amplified resists was analyzed. LER was characterized at the ADI CD stage and after the first mandrel etch CD in the pitch multiplication stack.